STA/Synthesis

Roles & Responsibilities:
  • Experience in Static Timing Analysis
  • Hands on with Prime Time/Gold Time/Design Compiler
  • Good at RTL Design/Sign OFF
  • Experience in LEC
  • Good understanding of ASIC Design flow & Methodologies
  • Experience in Timing Analysis at Top & Block levels
Preferred Education:
BE/B Tech or Higher
Location:
Europe
Area of Expertise:
STA/Synthesis/Prime Time/Gold Time/Design Compiler
Experience:
10+ Years
Job Code:
BA-2017-191
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